The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device, and more particularly to a semiconductor device including a conductive pattern and a method of manufacturing the semiconductor device.
According to the fineness and the high-integration of a semiconductor device in a recent time, in order to form more patterns within a limited region, it is necessary to reduce a line width and a space width of the pattern. The pattern is typically formed by using a photo lithography process, but the photo lithography may have a limitation in reducing a line width and a space width of the pattern due to an intrinsic resolution limit.
In order to form a fine pattern having a fine width over the intrinsic resolution limit in the photo lithography process, a double patterning technology of forming a fine pattern by using the patterns doubly overlapped and a spacer patterning technology of forming a fine pattern by using a spacer have been suggested.
In the meantime, a semiconductor device includes a plurality of metal wires and a plurality of contact pads connected to the plurality of metal wires. Accordingly, a layout for effectively aligning the plurality of metal wires and the plurality of contact pads in a narrow area may be desirable.